1. Field
The present disclosure relates to a semiconductor device, and more particularly, to a semiconductor device using a three dimensional channel, and/or a method of manufacturing the same.
2. Description of Related Art
Recently, a multi-gate transistor, which forms a silicon body of a fin or nanowire shape on a substrate and forms a gate on a surface of the silicon body, has been suggested as one of scaling technologies for increasing the density of a semiconductor device.
Such a multi gate transistor uses a 3 dimensional (3D) channel. Further, the electric current control capability may be improved without increasing the gate length of the multi gate transistor. Further, the short channel effects (SCE), in which the electric potential of the channel area is influenced by the drain voltage, may be limited.
Further, a laterally diffused MOS (LDMOS) or a drain extended MOS (DEMOS) may be applied as a gate transistor (e.g., a finFET), but the width of the fin may be fixed, and affect characteristics of the LDMOS or DEMOS (e.g., a high breakdown voltage and a low on-resistance).